1. Field of the Invention
The present invention relates to a digital TV receiver which adopts a vestigial side band (VSB) mode, and more particularly to an apparatus and method for detecting a synchronizing signal in even case that channel change frequently occurs.
2. Description of the Related Art
A VSB transmission mode suggested by Grand Alliance (GA) has remarkable features, such as a pilot signal, a data segment synchronizing signal, and a field synchronizing signal, than other digital TV transmission modes. These signals can be used to improve carrier recovery characteristic and timing recovery characteristic. The recovery characteristics of the synchronizing signals greatly act on performance of the overall system of the VSB mode.
A transmission party such as a broadcasting station transmits a signal through a mapper that acts to convert the signal to a desired power level. As an example, in case of 8 VSB for ground broadcasting, an output level of the mapper is one of eight symbol values (amplitude level), xe2x88x92168, xe2x88x92120, xe2x88x9272, xe2x88x9224, 24, 72, 120, and 168. The mapper forcibly inserts a segment synchronizing signal of four symbols for each unit of 828 symbols by a protocol and forcibly inserts a field synchronizing signal into a 313rd data segment location.
At this time, the protocol of the segment synchronizing signal has a logic format of 1, 0, 0, and 1. The output level of the mapper is 120 when the synchronizing signal is 1 while the output level is xe2x88x92120 when the synchronizing signal is 0. That is, the segment synchronizing signal is repeated with two levels per data segment.
FIG. 1 shows a frame format of VSB data including the data and the synchronizing signal. Referring to FIG. 1, one frame includes two fields while one filed includes 313 data segments. One data segment includes 832 symbols. In this case, fourth symbols of a start point in one data segment correspond to a segment synchronizing portion, and the first data segment in one field corresponds to a field synchronizing portion.
FIG. 2 shows a configuration of the field synchronizing portion.
Referring to FIG. 2, a data segment synchronization of four symbols, a PN511 sequence which is a pseudo random sequence, three PN63 sequences, and VSB mode information of 24 symbols are provided, while other 014 symbols are reserved. In other words, the PN511 sequence includes 511 pseudo random symbols. The second PN63 sequence of the PN63 sequences has an inverted symbol configuration per field, wherein xe2x80x981xe2x80x99 is inverted to xe2x80x980xe2x80x99 while xe2x80x980xe2x80x99 is inverted to xe2x80x981xe2x80x99. Accordingly, one field may be divided into an even field and an odd field depending on polarity of the second PN63 sequence.
Therefore, in the digital TV receiver, the synchronizing signals inserted during transmission should be restored. If the synchronizing signals are detected in error, data recovery is not performed easily. This could lead to adverse effect to the overall system.
A scheme of the synchronizing signal recovery currently suggested in GA includes three portions, i.e., a segment synchronizing signal recovery portion, a field synchronizing signal recovery portion, and a synchronizing lock signal generating portion, so as to detect the segment synchronizing signals and the field synchronizing signals.
The detected synchronizing signals are used for equalization and forward error correction (FEC). The synchronization in the digital TV receiver means that the location of the segment synchronizing signals and the location of the field synchronizing signals are exactly detected in the received signals. The synchronization also includes a carrier recovery and timing recovery.
At this time, to detect the field synchronizing signals, the segment synchronizing signals should first be locked. As an example, recovery of the segment synchronizing signal is obtained by correlation of (1,0,0,1). A method for detecting the segment synchronizing signals is a pattern match method. In the pattern match method, binary data of transmitted data are compared with binary data set in advance in a receiving party (field synchronizing data equal to data inserted from the transmission party), and then a segment having the smallest difference is considered as a field synchronizing signal. In this case, the segment should be detected several times as a field synchronizing signal in the same location by a reliability counter, to be considered as a field synchronizing signal. The binary data of the transmitted data means 5xcx9c515(511 symbols) portions of all the segments(832 symbols). That is, in pattern matching, the PN511 sequence of the 832 symbols is only used considering required time in pattern matching and hardware without using all the data of the field synchronizing signal portion.
FIG. 3a is a block diagram of a field synchronizing signal detector. Referring to FIG. 3, an absolute value operation unit 102 obtains an absolute value of the binary data set by the receiving party in the same field synchronizing format as the data inserted from the transmission party, and outputs the absolute value to a subtractor 101. The subtractor 101 obtains a difference value between the transmitted binary data and the output data of the absolute value operation unit 102 and outputs the resultant value to an absolute value operation unit 103.
The absolute value operation unit 103 obtains an absolute value of the output of the subtractor 101 and outputs the absolute value to an integrated unit 104.
The integrated unit 104 is reset by the segment synchronizing signal to accumulate the output of the absolute value operation unit 103 during 1 data segment period and output the accumulated value to a minimum error segment detector 105. That is, the absolute value of the data(error) output from the subtractor 101 is integrated at a symbol interval for all periods of respective segments. The minimum error segment detector 105 detects the location of the segment having the minimum value among the outputs of the integrated unit 104 and outputs the detected value to a reliability counter 106.
The reliability counter 106 identifies whether the location of the segment detected from the minimum error segment detector 105 is repeated per field. If so, the reliability counter 106 increases its value. If not so, the reliability counter 106 decreases its value. If the value of the reliability counter 106 exceeds a predetermined threshold value, the reliability counter 106 generates a field synchronizing detection signal.
FIG. 3b shows a difference between a field synchronizing period and a data period when the output signal of the absolute value operation unit 103 passes through the integrated unit 104. The segment having the smallest error after one field (313 segments) is temporarily selected as a field synchronizing signal. If the temporarily selected segment reaches a given reliability value, the field synchronizing signal is finally obtained. It should be understood that the segment synchronizing signal should essentially be locked in a portion where the field synchronizing signal is detected, so that it is possible to detect which one among input segments has a field synchronizing signal. In this case, two counters are required. One counter is a 832-counter for symbol counting while other counter is a 313-counter for segment counting.
FIGS. 4a to 4c show data, a segment synchronizing signal, and a field synchronizing signal when the synchronizing signals are locked. In this structure, a ghost signal becomes greater than a main signal in a case that a main path is temporarily blocked by movement of human being when receiving a digital TV signal of a VSB format through an internal antenna. In this case, the main signal is converted to a ghost signal. That is, since the greatest gain signal among input signals acts as the main signal in view of the digital TV receiver, previous synchronization related information is converted. Accordingly, the location of the synchronizing signals should be converted.
At this time, if it is determined that no reliability exists as the value of the reliability counter continues to decrease, a synchronizing signal for a new signal is obtained again. In this case, the synchronizing lock signal is released. Since the synchronizing lock signal is used as a reset signal of an equalizer, the equalizer is reset. A digital TV screen stands still during reset of the equalizer. This makes viewing of the digital TV difficult. Also, minimum two fields or more are required to detect a synchronizing signal in case that no reliability exists as the value of the reliability counter continues to decrease. This also makes viewing of the digital TV difficult.
Accordingly, the present invention is directed to an apparatus and method for detecting a synchronizing signal that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide an apparatus and method for stably detecting a synchronizing signal at high speed in even case that a serious ghost exists.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the scheme particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, an apparatus for detecting a synchronizing signal of a digital TV according to the present invention includes a correlation unit for obtaining a correlation value between a received signal for each unit of symbols and a preset reference field synchronizing signal, a maximum value detector for detecting a location of the symbol having a maximum correlation value while performing counting operation for a unit of a variable constant added to the number of symbols corresponding to one field, a synchronizing lock signal generator for generating a synchronizing lock signal by testing reliability of the symbol location detected by the maximum value detector, and a synchronizing location controller for calculating a relative location of the symbol location having a maximum value to generate a corresponding synchronizing signal if the synchronizing lock signal is generated by the synchronizing lock signal generator.
The correlation unit includes a finite impulse response (FIR) filter having even taps.
The correlation unit compares a sign of a field synchronizing signal value of a pattern equal to that inserted from a transmission party after setting the sign of the field synchronizing signal as a filter coefficient, with a sign of a received signal in each tap, adds the compared resultant values of each tap to one another, subtracts the added resultant value from an intermediate value if the added resultant value is smaller than the intermediate value, subtracts the intermediate value from the added resultant value if the added resultant value is greater than the intermediate value, and outputs a final resultant value as a correlation value.
The correlation unit further includes an absolute value operation unit for obtaining an absolute value of the output of the FIR filter.
The maximum value detector includes a correlation counter, and performs counting operation with a value obtained by subtracting the variable constant value from a total counting value if the location of the symbol having the maximum correlation value is detected.
The synchronizing lock signal generator includes a reliability counter, and increases a value of the reliability counter if a current maximum location is compared with a previous maximum location and they are in the same location, while activates the synchronizing lock signal if the value of the reliability counter is a constant value or greater.
The synchronizing lock signal generator substitutes a current location value for a previous location value if the current maximum location is different from the previous maximum location and the value of the reliability counter is xe2x80x980xe2x80x99.
The synchronizing lock signal generator decreases the value of the reliability counter while maintaining the previous location value if the current maximum location is different from the previous maximum location and the value of the reliability counter is not xe2x80x980xe2x80x99.
A method for detecting a synchronizing signal of a digital TV according to the present invention includes the steps of (a) obtaining a correlation value between a received signal for each unit of symbols and a preset reference field synchronizing signal, (b) detecting a location of the symbol having a maximum correlation value while performing counting operation for a unit of a variable constant added to the number of symbols corresponding to one field; (c) activating a synchronizing lock signal by testing reliability of the symbol location having the maximum correlation value; and (d) calculating a relative location of the location of the symbol having a maximum value through counting operation to respectively generate a segment synchronizing signal and a field synchronizing signal, if the synchronizing lock signal is activated.
In the preferred embodiment of the present invention, a variable counter is used so that the synchronizing signal is restored at high speed in even case that the synchronizing signal is varied due to serious channel distortion such as a case where a digital TV signal is received through an internal antenna.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.